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About Sharc

Why Sharc?

• Software/hardware co-design lab (Sharc) believes in the power of “1 + 1 > 2” — twice the efforts, 20 to 200 times improvements — isn’t it worth it?

What to do in Sharc?

• We explore the interdisciplinary research opportunities: ML-assisted EDA, accelerators for ML, EDA-assisted accelerators, etc.
• But, we don’t limit ourselves! We always welcome innovative directions and ideas!

Who comes to Sharc?

• Sharc always welcomes excellent students interested in the joint area of hardware design (FPGA, ASIC, etc.) and machine learning (DNNs, GNNs, etc.). We also have a broad interest in computer architecture, graph computation, and electronic design automation (HLS, etc.).

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Research Interests

• Software-hardware Co-design: hardware-efficient machine learning, ML/system co-design
• High-performance Reconfigurable Computing: FPGA, embedded system, edge computing
• Graph Neural Network (GNN) and Graph Computing: GNN for EDA, GNN acceleration
• Electronic design automation (EDA): high-level synthesis (HLS), domain-specific HLS

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Announcements

• We are NOT offering short-term and remote interns (in principle) — sorry about that!

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Prospective Students ★★ Please read this post first ★★

We are always expecting talented and hardworking students to join Sharc Lab. Please contact Dr. Callie Hao if you’re interested. Expected skills include FPGA, Verilog/HLS, GNN, ML, EDA, or compiler.

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Recent News

• [2024. 10] [Talk] Callie gave a talk “Agile Hardware Development: Architectures and Tools” at Research Colloquium Lecture Series @ UW ECE. Greatly appreciate Prof. Ang Li’s hosting. [slides]
• [2024. 09] [Paper & Honor] Our paper “HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond” (Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy John, Aman Arora, Cong Hao, collaborated with ASU and UT Austin teams), is accepted by MLCAD’24 and also won the Best Paper Award! [paper] [document] [code]
• [2024. 04] [Paper] Our paper “LightningSimV2: Faster and Scalable Simulation for High-Level Synthesis via Graph Compilation and Optimization” (Rishov Sarkar, Rachel Paul, Cong Hao) is accepted by FCCM’24.
• [2024.03] [Honor] Callie is awarded the NSF CAREER Award. All credits go to Callie’s brilliant students, collaborators, and colleagues! [link]
• [2024. 03] [Paper] Our paper “ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture Model” (collaborated with Samsung and Duke) is accepted by DAC’24.
• [2023. 12] [Talk] Callie gave a keynote talk “Ultra-Low-Latency Graph Neural Networks: Applications and Implementations” at the GTA3 workshop. [slides]
• [2023.09] [Honor] Callie is selected for the Intel® Rising Star Faculty Award (RSA). Thank you to all of Callie’s brilliant students and fantastic collaborators and colleagues! [link] [link]
• [2023.09] [Honor] Our work GNNBuilder, led by Stefan Abi-Karam, is awarded the FPL Community Award at FPL’23! It recognizes major open-source contributions that will affect the FPGA community for years [paper] [code] [link]
• [2023.07] [Paper] Three papers accepted by ICCAD’23.
  • “INR-Arch: A Dataflow Architecture and Compiler for Arbitrary-Order Gradient Computations in Implicit Neural Representation Processing“, Stefan Abi-Karam, Rishov Sarkar, Dejia Xu, Zhiwen Fan, Zhangyang Wang, Cong Hao
  • “Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts“, Rishov Sarkar, Hanxue Liang, Zhiwen Fan, Zhangyang Wang, Cong Hao [paper] [code]
  • “Rapid-INR: Storage Efficient CPU-free DNN Training Using Implicit Neural Representation“, Hanqiu Chen, Hang Yang, Stephen BR Fitzmeyer, Cong Hao [paper]
• [2023. 07] [Talk] Callie gave an invited talk “Smart Reconfigurable Computing for GNNs and Transformers + Smart HLS tool LightningSim” at the ROAD4NN workshop @ DAC’23. [slides]
• [2023. 05] [Paper] Our paper “GNNBuilder: An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization” (Stefan Abi-Karam, Cong Hao) is accepted by FPL’23. [paper] [code]
• [2023.05] [Honor] Our paper LightningSim, led by Rishov Sarkar, is awarded Best Paper Runner-up at FCCM’23! [paper] [code] [link]
• [2023.03] [Paper] Two papers accepted by FCCM’23.
  • “LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis“, Rishov Sarkar, Cong Hao
  • “DGNN-Booster: A Generic FPGA Accelerator Framework For Dynamic Graph Neural Network Inference“, Hanqiu Chen, Cong Hao (short paper)
• [2023.02] [Talk] Callie gave an invited talk “Smart Reconfigurable Computing for GNN and Transformer” at NCSU ECE Colloquia. [slides]
• [2023. 01] [Paper] Our paper “PreAxC: Error Distribution Prediction for Approximate Computing Quality Control using Graph Neural Networks” (Lakshmi Sathidevi, Abhinav Sharma, Nan Wu, Xun Jiao, Cong Hao) has been accepted by ISQED’23.