Vitis HLS Puzzle
By Rishov Sarkar Jan 24, 2023
Here’s a “fun” little puzzle I recently solved. In the following screenshot, why does Vitis HLS think that the C testbench failed and refuse to run cosimulation?
- The testbench runs to completion and exits with return code 0. No segfaults or anything like that.
- The kernel code is correct, i.e., no issues with
#pragma HLS interface depth=….
- This error occurs during the C testbench pre-check, before the RTL simulation runs at all, so it doesn’t have anything to do with the simulation itself.
Still stumped? Here’s a hint. In the following screenshot, everything works: Vitis HLS doesn’t complain and runs cosimulation to completion.
Do you see the difference?
Vitis HLS saw the string
Error: in the output
Average Error: 0.015153 and assumed the testbench failed!
Moral of the story: before working with Vitis HLS, learn some synonyms for the word “error”. Maybe “deviation” or “discrepancy”?!